1. Field of the Invention
This invention relates to the field of semiconductor memory devices. In particular, this invention relates to semiconductor memory devices in which drive capacity of a sense-amplifier driver can be varied.
2. Description of the Related Art
DRAMs comprising a memory-cell unit made up of a plurality of memory cells connected to a bit line via a bit line contact have been developed. For example, a NAND-type DRAM can comprise a memory-cell unit made up of a plurality of memory cells. Since bit-line contacts of the NAND-type DRAM are smaller than those of a DRAM which connects each memory cell via corresponding bit line contacts to a bit line, cell area can be reduced using NAND-type DRAMs.
When reading data from the memory-cell unit of a NAND-type DRAM, data is read from the cells closest to the bit-line contact one at a time. Data read from the cells can be restored to the cells by providing the data to the cells farthest away from the bit line contact in a sequence reversed from the read sequence. For this reason, sense amplifiers must be operated twice for every bit of data during the reading-out and restoring operations.
To reduce the number of times the sense amplifiers must be operated, a method has been developed, in which a bit line of the sense-amplifier section is electrically separated from a bit line of the cell array section, thereby permitting only the signal of the bit line of the sense-amplifier section to be amplified during reading-out operation. Such a method is described in IEEE ISSCC DIGEST OF TECHNICAL PAPERS, vol. P28, WP3.4, 1993. According to this method, since only the bit line of the sense-amplifier section, which has a light capacity, is amplified in the sense-amplifier operation, currents, especially the peak currents accompanied by the operation, can be reduced. In contrast, during the restoring operation, there is a problem that currents may become large since the bit line of the cell array section must be amplified. This problem may led to an increase in power-supply noise.
Moreover, the cycle time of writing data to a memory cell is determined according to a drive capacity of the sense-amplifier driver. Usually, as compared with a serial cycle time of the reading-out operation, a serial cycle time of the writing operation is longer. Thus, because of such an imbalance in the cycle times, problems in the system design of DRAM may occur.